Linear analog-to-digital converters presently exist capable of meeting a wide range of operational specifications for use in different applications. Certain applications, however, pose requirements which are better met by logarithmic-types of analog-to-digital converters. Logarithmic converters frequently have advantages over linear converters in applications requiring a very large dynamic range and where the desired accuracy, and hence round-off error, is measured in terms of a specified percentage of the input signal rather than a specified percentage of the maximum output indicated by the converter.
Various techniques for performing logarithmic analog-to-digital conversions have been developed including techniques using the exponential decay with time of a voltage in an RC circuit, circuits in which the linear-to-logarithmic conversion is performed by utilizing the exponential characteristics of a semiconductor junction to perform an analog linear-to-logarithmic conversion which is then converted to digital form, as shown in U.S. Pat. No. 3,444,550, piecewise-linear conversion techniques, and converters using cascaded amplifiers having exponentially related gains which may be switched into and out of a circuit for amplifying a reference voltage, as in U.S. Pat. No. 3,646,548.